> RISC-V is praised only by people who have very little or no experience with different CPU ISAs and with the history of their evolution.
I'm having trouble actually digging up the reference right now, but I've been told that it was specifically built out of decades of industry experience in what works in building processors/ISAs.
> RISC-V sucks more than even the ugliest ISA, x86.
How so?
> At least from the huge x86 ISA it is possible to extract a subset composed mostly of more recently introduced instructions, which can be considered as a decent ISA, except for the weird encoding, with many prefix bytes, which is needed for backward compatibility.
I'm having trouble actually digging up the reference right now, but I've been told that it was specifically built out of decades of industry experience in what works in building processors/ISAs.
> RISC-V sucks more than even the ugliest ISA, x86.
How so?
> At least from the huge x86 ISA it is possible to extract a subset composed mostly of more recently introduced instructions, which can be considered as a decent ISA, except for the weird encoding, with many prefix bytes, which is needed for backward compatibility.
So, exactly like RISC-V base + extensions?