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Datacenter CPUs are much larger than consumer parts and yield goes down with the square of the die area. They start with these because the margins go up faster than square of the die area.


But modern techniques exist to deal with problems in a large die (ie testing and then segmenting off cores with mistakes on them), so the fact they’re starting with large chip die sizes doesn’t really tell you much, no?


The top end most profitable SKUs are fully enabled dies. That they are now able to ship dies this large is a good sign. The 10nm laptop chips they have produced so far were rumored to have atrocious yield.


"The top end most profitable SKUs are fully enabled dies." If you take a part that would be discarded because it didn't make "top end" binning, and sell it as a lesser(core count or clock speed) chip. Isn't that profit from what would otherwise be scrap?


Yes. But that’s a silver lining to a black cloud not the best case scenario.


My impression is the vast, vast majority of chips have at least part of the chip disabled to help solve yield problems. So it seems to be the status quo?


Die harvesting is not perfect. If there is an error in a logic transistor, they can turn off that cpu core and use the rest of the chip. If there is a short between ground and power, the whole chip is useless because it will melt when you plug it in.

Yields on larger chips are still substantially worse than smaller chips, even with harvesting.


Interesting, that’s informative. Well that sounds like a big advantage for the chiplet approach.


And here I always thought it was because, should your large die have an issue, you can likely sell it as a lower-binned SKU with the failed area gated off. This way you end up with more inventory of a chip you intend to sell, or you have a high margin chip - win-win!




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